@MIKROSOFT: My actual implementation is a 6502 specific code cycle, which runs exactly for 0.1 sec (by checking for the raster counter to count until 5 or 6 full screen frames for PAL or NTSC), while counting the executed machine cycles of the CPU. There are several embedded cycles by using the X and Y registers for counting the fraction in the x.yy MHz form (plus further variables for the integer part, too). The innermost part must take some 10.000 machine cycles for the decimals (which I also count in the form of 10 x 10 x 100 in embedded rounds). That is pretty simple as a matter of fact, but it needs to very carefully be chosen for exactly the same time (and also to contain the continuous checking for the time period on the raster counter with disabled IRQ of course).
You just need to write the equivalent code cycle for Z80.
The actual method (together with source code) is described here (at page 24):